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1 Logic Design with MSI Circuits ว ตถ ประสงค ของบทเร ยน ร จ กวงจรประเภท MSI เข าใจการทำงานของวงจร MSI ท ม ใช อย ท วไป สามารถประย กต ใช วงจร MSI ในการออกแบบวงจรลอจ กแบบต างๆ ได A. Yaicharoen 1
2 Type of Circuits Type of circuits Number of gates Small-scale integration (SSI) 1-10 Medium-scale integration (MSI) Large-scale integration (LSI) 100-1,000 Very-large-scale integration (VLSI) 1,000 up หมายเหต หน งส อบางเล มแบ งวงจรท ม เกตต งแต 1,000,000 เกต ข นไป ให อย ในกล ม ULSI (Ultra-large-scale integration) A. Yaicharoen 2
3 Multiplexers (MUXs) - also called a data selector Input lines consist of - data lines: 2 n lines - select lines: n lines - there may or may not be an enable line Output line: - output line: 1 line A. Yaicharoen 3
4 Multiplexer Function -Truth table of a 4:1 multiplexer (without enable) S 1 0 Select inputs S Output Y Y = S. + I I 0 I 1 I 2 I 3 1 S0. I0 + S1. S0. I1 + S1. S0. I 2 S1. S0. 3 A. Yaicharoen 4
5 Multiplexer Function -Truth table of a 4:1 multiplexer (with enable) Enable E Select inputs S 1 S 0 0 X X Output Y Y = E.(S 1.S 0.I 0 + S 1.S 0.I 1 + S 1.S 0.I 2 + S 1.S 0.I 3 ) I 0 I 1 I 2 I 3 A. Yaicharoen 5
6 Logic Circuit Design using Multiplexer Advantages No need for logic simplification Minimize the IC package count Simplify the logic design A. Yaicharoen 6
7 Logic Design using MUX Case 1: Number of inputs is equal to number of select lines Design procedure Identify the decimal number corresponding to each minterm in the expression Connect logic 1 level to input lines corresponding to these numbers Connect logic 0 level to the others Connect inputs to selected lines A. Yaicharoen 7
8 Case1: Inputs = Select lines a three-variable function using a 8-to-1-line multiplexer A. Yaicharoen 8
9 Example f(x,y,z) = Σm(0,2,3,5) using 8-to-1-line multiplexer A. Yaicharoen 9
10 Logic Design using MUX Case 2: Number of inputs is higher than number of select lines Procedure 2.1: Reduce the number of inputs to the number of select lines by inspection k-map A. Yaicharoen 10
11 Case 2 -Truth table of a 3 variable logic circuit Input Output Input Output x y z Y x y z Y f f f f f f f f 7 A. Yaicharoen 11
12 Case2.1: Reducing Inputs a 3-variable Boolean function using a 4-to-1-line multiplexer A. Yaicharoen 12
13 Example f(x,y,z) = Σm(0,2,3,5) using a 4-to-1-line multiplexer A. Yaicharoen 13
14 Reducing Inputs with K-map A. Yaicharoen 14
15 Example f(x,y,z) = Σm(0,2,3,5) A. Yaicharoen 15
16 More on Reducing Inputs (a) Applying input variables y and z to the S 1 and S 0 select lines. (b) Applying input variables x and y to the S 0 and S 1 select lines. A. Yaicharoen 16
17 Example f(x,y,z) = Σm(0,2,3,5) (a) Applying input variables y and z to the S 1 and S 0 select lines. (b) Applying input variables x and y to the S 0 and S 1 select lines. A. Yaicharoen 17
18 Reducing 4-input to 3-input A. Yaicharoen 18
19 Example f(w,x,y,z) = Σm(0,1,5,6,7,9,12,15) A. Yaicharoen 19
20 Logic Design using MUX Procedure 2.2: Use multiplexer tree when number of inputs exceeds the largest number of inputs on available ICs Can be done by one of these two techniques - connect the MSB input to the enable/strobe input - connect the MSB input to another multiplexer A. Yaicharoen 20
21 Demultiplexers/Decoders -Performs the reverse operation of a multiplexer Input lines are: - 1 data line - n select lines - maybe 1 enable Output lines are - 2 n output lines A. Yaicharoen 21
22 Application Example A multiplexer/demultiplexer arrangement for information transmission A. Yaicharoen 22
23 Decoders A n-to-2 n -line decoder is a circuit that only one of the output line responds to the n-input data. Number of input:output is n:2 n (Note: a demultiplexer is a decoder with an enable input acting as a data input line A BCD to 7-segment decoder is a circuit that 7-bit output will make each segment of the 7-segment lit according to the 4-bit input A. Yaicharoen 23
24 A. Yaicharoen 24
25 A. Yaicharoen 25
26 3-to-8-line Decoder A. Yaicharoen 26
27 Application Example การใช 3-to-8-line decoder และ or-gate ในการสร างวงจร f1(x2,x1,x0) = Σm(1,2,4,5) และ f2(x2,x1,x0) = Σm(1,5,7) A. Yaicharoen 27
28 Application Example f 1 (x 2,x 1,x 0 ) = Σm(0,1,3,4,5,6) = Σm(2,7) and f 2 (x 2,x 1,x 0 ) = Σm(1,2,3,4,6) = Σm(0,5,7) A. Yaicharoen 28
29 Application Example f 1 (x 2,x 1,x 0 ) = ΠM(0,1,3,5) and f 2 (x 2,x 1,x 0 ) = ΠM(1,3,6,7) (a) Using output or-gates. (b) Using output nor-gates. A. Yaicharoen 29
30 3-to-8-line decoder using nand-gates A. Yaicharoen 30
31 Application Example f 1 (x 2,x 1,x 0 ) = Σm(0,2,6,7) and f 2 (x 2,x 1,x 0 ) = Σm(3,5,6,7) (a) Using output and-gates. (b) Using output nand-gates. A. Yaicharoen 31
32 A. Yaicharoen 32
33 A. Yaicharoen 33
34 A. Yaicharoen 34
35 A. Yaicharoen 35
36 Decoder with Enable Input And-gate 2-to-4-line decoder with an enable input A. Yaicharoen 36
37 Encoders - Similar to decoders - Usually number of input lines are more than number of output lines Number of input:output is 2 n :n A. Yaicharoen 37
38 A. Yaicharoen 38
39 A. Yaicharoen 39
40 A. Yaicharoen 40
41 A. Yaicharoen 41
42 A. Yaicharoen 42
43 Binary Adders Binary Half-Adder Binary Full-Adder x i y i s i c i x i y i c i-1 s i c i A. Yaicharoen 43
44 Binary Full-Adder s i = x i '.y i '.c i +x i '.y i.c i '+x i.y i '.c i '+x i.y i.c i c i+1 = x i.y i + x i.c i + y i.c i A. Yaicharoen 44
45 Parallel Binary Adder Parallel (ripple) binary adder A. Yaicharoen 45
46 Binary Subtractor Binary Half-Subtractor Binary Full-Subtractor x i y i d i b i x i y i b i d i b i A. Yaicharoen 46
47 Parallel Binary Subtractor Parallel (ripple) binary subtractor A. Yaicharoen 47
48 Parallel Binary Adder/Subtractor A. Yaicharoen 48
49 Carry Look-ahead Adder From Boolean expression of the F.A. c i+1 = x i y i + (x i +y i )c i Let s g i = x i y i (carry-generate function) and p i = (x i +y i ) (carry-propagate function) c 1 = g 0 + p 0 c 0 c 2 = g 1 + p 1 c 1 = g 1 + p 1 (g 0 + p 0 c 0 ) = g 1 + p 1 g 0 + p 1 p 0 c 0 A. Yaicharoen 49
50 Carry Look-ahead Adder (cont.) c 3 = g 2 + p 2 c 2 = g 2 + p 2 (g 1 + p 1 g 0 + p 1 p 0 c 0 ) = g 2 + p 2 g 1 + p 2 p 1 g 0 + p 2 p 1 p 0 c 0... c i+1 = g i + p i g i-1 + p i p i-1 g i p i p i-1...p 1 g 0 + p i p i-1...p 0 c 0 A. Yaicharoen 50
51 Carry Look-ahead Adder (cont.) Σ Σ Σ A. Yaicharoen 51
52 BCD Arithmetic BCD Adder Using a 4-bit binary adder to perform two one digit BCD addition a decimal 6 (binary ) will be added to the result if the sum output is an invalid BCD or if a carry at the MSB is 1 each BCD adder can be cascaded for adding several BCD digits A. Yaicharoen 52
53 BCD Arithmetic BCD Subtractor Convert the subtrahend to its 9 s complement form Add the result to the minuend If the summation result is an invalid BCD code or if the carry from the MSB is 1, add decimal 6 (binary ) and the end around carry (EAC) to this sum If the summation result is a valid BCD code, the result is negative and in the 9 s complement form A. Yaicharoen 53
54 Nine s Complementer Circuit A 9 s complementer circuit is a circuit designed to convert a decimal digit (in BCD code) to its 9 s complement created by adding binary to the 1 s complement of the number (ignore the carry) (Proof is left as a student exercise) A. Yaicharoen 54
55 Arithmetic Logic Unit (ALU) performs arithmetic and logic operations (depends on the selected mode) Read details and example in section 6.6 A. Yaicharoen 55
56 Comparators A comparator is a circuit that compares the magnitudes of two binary numbers Input: A i, B i, G i, E i, L i G i = 1 when A i-1 A i-2...a 1 A 0 > B i-1 B i-2...b 1 B 0 E i = 1 when A i-1 A i-2...a 1 A 0 = B i-1 B i-2...b 1 B 0 L i = 1 when A i-1 A i-2...a 1 A 0 < B i-1 B i-2...b 1 B 0 Output: G i+1, E i+1, L i+1 G i+1 = 1 when A i A i-1...a 1 A 0 > B i B i-1...b 1 B 0 E i+1 = 1 when A i A i-1...a 1 A 0 = B i B i-1...b 1 B 0 L i+1 = 1 when A i A i-1...a 1 A 0 < B i B i-1...b 1 B 0 A. Yaicharoen 56
57 1-bit Comparator A. Yaicharoen 57
58 Other MSI Circuits Parity generators/checkers Code converters BCD-to-binary converter Binary-to-BCD converter Priority encoders Decimal-to-BCD encoder Octal-to-binary Encoder Decoder/drivers for display devices BCD-to-decimal decoder/driver BCD-to-7-segment decoder/driver A. Yaicharoen 58
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